firmware

Timer Frequency

Timer output frequency and period from system clock, prescaler, and ARR.

Inputs — STM32 Timer (TIMx)
For TIM2/TIM5 (32-bit): ARR can go up to 4,294,967,295.
This calculator uses 16-bit max for common timers.
Results
Timer Frequency
Period (overflow)
Divisor
f = f_CLK / ((PSC+1) × (ARR+1))
Set PSC to divide clock, ARR to set overflow count.
Example: 72 MHz, PSC=71, ARR=999 → 1 kHz / 1 ms period.